As part of the design and fabrication of a complex high-speed integrated circuit, it is often essential to observe the logic state switching of the individual devices comprising the circuit. Information on circuit timing is useful to diagnose problems relating to high frequency operation, propagation delays, and critical timing paths. A number of techniques have been developed to make dynamic circuit measurements, such as electron beam testing, electro-optic sampling, photoconductive sampling, and photoemissive sampling. Common to all these techniques is the requirement for providing an external probe (electron beam or laser) to perform the test. This requirement leads to the inability to determine timing at more than one device at a time. For a variety of practical reasons, only electron beam testing has achieved widespread use in commercial chip development. Chief among these reasons is that the other techniques require special structures or materials on the chip which are incompatible with conventional silicon processing. Electron beam testing is limited by the need to access the relevant metal interconnect at the front surface by the electron beam. As logic circuits become more complex, with additional layers of metal interconnects and "flip-chip" bonding, the use of electron beam testing will become problematic.
A summary of the characteristics useful in a diagnostic tool includes the ability to measure many devices on the chip simultaneously, no special conditions for chip preparation or design, a technique which is non-destructive of the device, the ability to measure from the front side or the back side of the wafer, and the ability to measure internal switching speeds exceeding 10 GHz. Such a tool would provide information that would lead to both enhanced device performance and more rapid chip development, prototyping and debugging. For example, if specific devices or subcircuits of a chip can be identified as limiting the overall speed of the complete circuit, redesign of, or process modifications for, this portion of the chip can increase the yield of chips that operate at high clock speeds, increasing the performance and the economic value of the chips which are produced.
It has been known for several years that electronic devices, even majority carrier devices such as field effect transistors, including those fabricated from indirect bandgap materials such as silicon, can emit light when current is continuously passing through the device. There are a number of inventions relating to the use of these emissions to probe for failures or long-term degradation in individual devices:
U.S. Pat. No. 4,680,635 addresses the detection of light which is emitted continuously by a defective device on an integrated circuit as a means of failure analysis. This light is emitted as a result of avalanche breakdown, latch-up, current conduction through a damaged dielectric, or electrostatic discharge. Although this patent addresses enabling an image intensifier "for fixed periods of time to provide time resolution" of the images, the purpose of the time resolution is to help identify hot electron-induced long term degradation. In this patent and in the prior art, the term "time varying" refers to the decay or build-up of emissions due to the failure or degradation of a device, and not to the dynamic emissions from a normally-operating circuit which are synchronized with the logic switching of the circuit. The limited scope of this patent can be seen in the specific means chosen to obtain time resolution, that of electronically gating an intensifier. The time resolution obtainable by gating an intensifier is many orders of magnitude too slow for measuring the high speed (&gt;1 GHz) switching of modern operating devices. Such a gating technique also makes such inefficient use of the available photons as to be very difficult to implement.
U.S. Pat. Nos. 4,755,874 and 4,811,090 provide improved means of image processing to aid in detecting the continuous faint emission discussed in U.S. Pat. No. 4,680,635. U.S. Pat. No. 5,006,717 describes a method to estimate the operating lifetime of an integrated circuit by measuring the spectral characteristics and supply voltage dependence of the optical emission associated with hot carriers.
Although each of the above patents considers using the optical emissions from silicon integrated circuits as a diagnostic for circuits, none of them address circuit timing analysis on a circuit with fully functional devices. Instead, these patents disclose the use of continuous or quasi-continuous optical emissions to evaluate circuits which are degrading due to hot carrier effects or which have already failed.
As disclosed herein, we have discovered that normally-operating (i.e., fully functional) CMOS devices emit transient pulses of light coincident with logic state switching. Further, as disclosed herein, these transient pulses of light from normally functioning devices can be used to produce useable information about the timing of such devices.